The present invention relates generally to a capacitor of a DRAM device and, more specifically, to a capacitor of a DRAM device having an increased surface area and to a process of manufacture.
Typical Dynamic Random Access Memory (DRAM) cells have a transfer device, such as a field effect transistor (FET), having a capacitor for storing charge. Conventional capacitors include the stacked capacitor and the trench capacitor. In the trench capacitor, charge is stored vertically in a trench extending from a substrate.
The DRAM cell is so named because it can retain information only temporarily, on the order of milliseconds, even with power continuously applied. Therefore, the cell must be read and refreshed at periodic intervals. Although the storage time may at first appear very short, it is actually long enough to permit many memory operations between refresh cycles. The advantages of cost per bit, device density, and flexibility of use (i.e., both read and write operations are possible) have made DRAM cells the most widely used form of semiconductor memory to date.
Generally, the integrated circuit technology of a DRAM cell is based on the ability to form numerous transfer devices in a substrate. Recently, new techniques have enabled the reduction of DRAM cell dimensions, such as by shortening the length of the channel of the FET. As a result, the number of integrated circuits fabricated on a wafer has dramatically increased.
Unfortunately, DRAM device shrinkage has also reduced the size of the trench capacitors of DRAM cells. The reduction of trench capacitor surface area is the result of numerous factors. One cause of the surface area decrease is the reduction in trench mask opening size. A second cause of surface area decrease in the trench capacitor is the reduced trench depth that can be attained with the smaller trench mask opening size. As trench capacitor surface areas shrink, the capacitance of the trench capacitor also decreases. In addition, trench capacitor leakage does not decrease proportionally with capacitor size.
The decrease in the capacitance of conventional capacitors of DRAM cells show that a need exists for increasing the capacitance of the trench capacitor. To overcome the shortcomings of conventional DRAM cell capacitors, a new capacitor for a DRAM device and a process for fabricating such a capacitor are provided. An object of the present invention is to provide a capacitor of a DRAM device having an increased capacitance. A related object is top provide a DRAM capacitor having an increased capacitor retention time. Still another object of the present invention is to provide a process suitable for manufacturing a capacitor of a DRAM device having an increased capacitance and, therefore, an increased capacitor retention time.
To achieve these and other objects, and in view of its purposes, the present invention provides a capacitor of a DRAM device having an increased capacitance. Also provided is a process of fabricating the capacitor. More specifically, the present invention provides a dual trench capacitor comprising a first trench adjacent a second trench in a substrate. The trenches have a top on the surface of the substrate, a bottom in the substrate, and opposing inner and outer side walls extending from the top to the bottom. The inner side wall of the first trench electrically contacts the inner side wall of the second trench.
The dual trench capacitor of the invention is fabricated by forming a mask on a substrate, the mask having a mask island formed between openings in the mask which extend to the surface of the substrate. The substrate is etched through the openings to form the trenches. In one embodiment, the mask island and a portion of the substrate surface underlying the mask island are removed such that the first trench electrically contacts the second trench. In another embodiment, the trench side walls are radially expanded below a surface of the substrate such that the trench inner walls electrically contact.
The present invention also provides a trench capacitor having a single trench, in which the trench is curved around an axis substantially perpendicular to the substrate surface. The single trench capacitor of the present invention is fabricated by forming a mask on a substrate, the mask having a mask island and an opening curved around an axis substantially perpendicular to a surface of the substrate. The exposed substrate surface is etched to form the trench.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, but are not restrictive, of the invention.